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Description
This work presents the design, fabrication, and silicon bring-up of a CMOS integrated circuit developed through a full-custom VLSI tape-out project in TSMC 180 nm technology. The fabricated chip integrates inverter-based and NAND-based multi-stage ring oscillators along with a two-stage operational amplifier. A complete custom design flow was followed, including schematic design, pre- and post-layout simulation, physical layout, DRC, LVS, parasitic extraction, and verification using industry-standard EDA tools. Ring oscillators with varying stage counts were implemented to analyze the effects of logic topology, parasitics, and supply voltage on oscillation frequency, with post-layout simulations predicting frequencies from the megahertz to gigahertz range. Silicon bring-up was performed using probe-station testing, PCB mounting, and packaged devices. Measured results showed stable oscillation and expected frequency scaling with minor deviations attributed to parasitics and loading effects. The operational amplifier was validated in multiple configurations, achieving a closed-loop gain matching design targets and an open-loop gain of approximately 180 V/V.
Acknowledgements: The authors acknowledge the support of the Apple New Silicon Initiative (NSI) and National Science Foundation under Grant No. EES-2436204. Special thanks to Eric Smith from Apple for his technical guidance throughout the project.
| Academic or Professional Status | Undergraduate Student |
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