Speaker
Description
The rapid adoption of artificial intelligence in semiconductor systems has exposed a persistent gap in engineering education: students often learn AI using high-level software platforms without understanding how underlying silicon realities shape performance, efficiency, and reliability. This disconnect, referred to as the Cleanroom Barrier, separates algorithmic learning from hardware constraints such as power consumption, thermal behavior, and physical variability, limiting students’ ability to reason across the full AI–hardware stack. This work proposes a portable Lab-to-Go educational approach that enables experiential learning at the intersection of machine learning and semiconductors, without reliance on traditional cleanroom facilities or large-scale infrastructure. By emphasizing hands-on interaction with real hardware and observable system behavior, the approach reinforces the connection between AI models and the physical platforms on which they execute. The proposed direction supports workforce development needs in the CHIPS era by promoting systems-level thinking and preparing students to design, evaluate, and deploy AI solutions with an awareness of semiconductor constraints.
| Academic or Professional Status | Faculty |
|---|
